| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent generation of dust due to stripping of the side wall of a filling plug material formed in an alignment mark by setting the minimum width of a recess to be made in the alignment mark equal to or shorter than the diameter of a contact hole made in a region for forming a semiconductor element and equal to or longer than a value for allowing detection of alignment mark. SOLUTION: NSG and BPSG are deposited as an interlayer insulation layer 5 on a semiconductor substrate 1 where the gate electrode 6 and source/drain region 7 of a transistor are formed in a region for forming a semiconductor element. A contact hole 4 and an alignment mark 2 are then provided by dry etching. Subsequently, the recess 2a of alignment mark is filled with a plug material 3 for filling the contact hole 4. In this regard, minimum width of the recess 2a is set equal to or shorter than the diameter of contact hole 4 and equal to or longer than a value for allowing detection of alignment mark. Furthermore, dry etching is performed in order to form a contact.</p> |
