发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent a check pattern from being deformed in a photolithography process. SOLUTION: For instance, a first wiring layer 5-1, a BPSG film 4, and a field oxide film 2-2 are formed under a through-hole main scale pattern 7-2A and a resist vernier scale pattern 9-2A used for reading deviation in a lithography process where a second wiring conductive film 8 is patterned, whereby a pattern is protected against deformation caused by defocus of the resist vernier scale pattern 9-2A.
申请公布号 JPH0997796(A) 申请公布日期 1997.04.08
申请号 JP19950251533 申请日期 1995.09.28
申请人 NEC CORP 发明人 ARITOKU TAKEHIRO
分类号 H01L21/3213;H01L21/027;(IPC1-7):H01L21/321 主分类号 H01L21/3213
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