| 摘要 |
Line set-up detection circuit 22-1 detects N successive conformities in line information Sa from a network side line terminating set 1 and a signal Sb representing the result of detecting N successive conformities with an error correction code added thereto to the network side line terminating set 1. Network side line set-up control circuit 12 generates a line set-up permission signal Sc or a line set-up inhibition signal Sd on the basis of the signals Sb representing the result of detecting N successive conformities from all user's side line terminating sets 2-1 through 2-3 and transmits it to each of the user's side line terminating sets 2-1 through 2-3. User's side line set-up control circuits 24-1 writes the contents of line set-up primary memory 23-1 into line set-up main memory 25-1 when it receives a line set-up permission signal Sc and inhibits the contents of the line set-up primary memory 23-1 from being written into the line set-up main memory 25-1 when it receives a line set-up inhibition signal Sd.
|
