| 摘要 |
In order to avoid thermal runaway bipolar transistors, emitters are provided with ballast resistors. Elongate ballast resistors may be used, part of the lengths being connected for obtaining suitable resistance and design variability. The emitters are split up into a plurality of emitter portions, each with a separate emitter ballast resistor. The collector and base are correspondingly split up. The transistor is split up into unit cells, each comprising an emitter, a ballast resistor, a base, and a collector, which are respectively connected via respective common leads. This structure may advantageously be realized in a SOI technique, the galvanic isolation enabling unproblematic mixing of digital and analog and power devices in the same chip. |
