发明名称 EDGE DETECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an edge detection circuit with which power consumption is suppressed by stopping operating a D flip-flop in the state of detecting no edge. SOLUTION: This circuit is composed of n or more than four of 1st-groups, D-FF 11 to 14, for receiving input signals, two of 2nd-groups, D-FF 21 and 22, for receiving edge detection control signals ENB, AND circuit 51 for inputting the output from the 1st stage 11 among the 1st-group D-FF, the inverted output from the 1st stage 21 among these 2nd-group D-FF and the output from the 2nd stage 22, and 3rd D-FF 31 for receiving the output of this AND circuit 51.
申请公布号 JPH0993099(A) 申请公布日期 1997.04.04
申请号 JP19950251552 申请日期 1995.09.28
申请人 NEC CORP 发明人 MIO YUICHIRO
分类号 H03K5/1532;H03K5/1534 主分类号 H03K5/1532
代理机构 代理人
主权项
地址
您可能感兴趣的专利