发明名称 NAND TYPE MASK ROM
摘要 <p>PROBLEM TO BE SOLVED: To obtain an NAND type mask ROM in which erroneous data is prevented from being read out. SOLUTION: The NAND type mask ROM comprises a first transistor TR1 connected with a plus power supply VDD, a second transistor TR2 connected with a minus power supply VSS, a plurality of memory transistors T1-Tn connected in series between the first and second transistors TR1, TR2 and also connected with the first transistor TR1, and a bit line BL for reading out data from the memory transistors T1-Tn. A pull-up transistor TR3 is connected between the plus power supply VDD and the bit line BL in order to suppress voltage drop of bit line at the time of reading out the data.</p>
申请公布号 JPH0991981(A) 申请公布日期 1997.04.04
申请号 JP19950243238 申请日期 1995.09.21
申请人 NIPPON PRECISION CIRCUITS KK 发明人 OTAKA YASUAKI
分类号 H01L21/8247;G11C17/12;H01L27/115;(IPC1-7):G11C17/12 主分类号 H01L21/8247
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