发明名称 IC-Gehäuse mit elektrischen Leitern in einem dielektrischen Verpackungskörper
摘要 An IC package comprising a dielectric package body for encapsulating the semiconductor chip (31) and including a bottom member (1), first and second dielectric annular members (3, 7) surrounding the semiconductor chip, and a cap member (10). A first portion of the upper surface of the first dielectric annular member (3) is covered by the second dielectric annular member and a second portion of the upper surface of the first dielectric annular member (3) is exposed, whereby a strip line (Za) is formed by the second conductor film (8), the electric conductor lines (5 and 6), and a first covered portion of the first conductor film (4), and a microstrip line (Zb) is formed by the electric conductor lines (5 and 6), and a second exposed portion of the first conductor film (4). A third conductor film (9a and 9b) to be grounded is provided in the first dielectric annular member (3) in correspondence with the second exposed portion of the first dielectric annular member (3), which is closer to the conductor lines (5 and 6). The third conductor film (9a,9b) matches the impedance of the microstrip line (Zb) with that of the strip line (Za). Further conductors (9c,14) may also be included to reduce the impedance of a power supply conductor line (5). <IMAGE>
申请公布号 DE69123323(T2) 申请公布日期 1997.04.03
申请号 DE1991623323T 申请日期 1991.09.04
申请人 FUJITSU LTD., KAWASAKI, KANAGAWA, JP 发明人 TAMAMURA, MASAYA, INAGI-SHI, TOKYO 206, JP;MORINO, YOSHIRO, TSUKUBA-SHI,IBARAKI 304, JP
分类号 H01L23/12;H01L23/057;H01L23/498;H01L23/64;H01P1/00;H01P3/08 主分类号 H01L23/12
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