发明名称 Duty cycle independent tunable clock
摘要 An internal clock that generates a signal from a system clock is provided. The signal generated by the internal clock has a duty cycle that is independent of the system clock. The internal clock may be tuned to provide a desired duty cycle that corresponds to the period required for an operation such as a write to memory. The internal clock may provide a duty cycle that is longer or shorter than the system clock. The signal generated by the internal clock has the same period as the signal generated by the system clock to maintain synchronization of system operations.
申请公布号 US5617563(A) 申请公布日期 1997.04.01
申请号 US19940334687 申请日期 1994.11.04
申请人 SONY CORPORATION OF JAPAN;SONY ELECTRONICS, INC. 发明人 BANERJEE, PRADIP;CHUANG, PATRICK;GHIA, ATUL V.
分类号 H03K5/05;G06F1/08;G06F1/10;(IPC1-7):G06F1/08 主分类号 H03K5/05
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