发明名称 IMAGE PROCESSING UNIT
摘要 <p>PROBLEM TO BE SOLVED: To conduct expansion processing of image data efficiently by applying coordinate operation to a general purpose microprocessor conducting software processing and a peripheral circuit conducting hardware processing. SOLUTION: First and second microprocessors 10, 11 capable of parallel processing are used to process data requiring processing including comparatively complicated arithmetic operations such as inverse discrete cosine transformation. A block loader 15 and a VLC decoder 14 are used for hardware-processing for data requiring comparatively simple processing as shown in the following: processing requiring frequent memory access such as read of other frame data for processing of inter-frame predict coding image and processing substantially difficult of parallel processing such as decode processing of a picture element such as variable length coding. The conventional microprocessors 10, 11 conducting software processing and peripheral circuits 14, 15 conducting hardware processing are operated in cooperation.</p>
申请公布号 JPH0984004(A) 申请公布日期 1997.03.28
申请号 JP19950231674 申请日期 1995.09.08
申请人 MITSUBISHI ELECTRIC CORP 发明人 YOSHIDA TOYOHIKO
分类号 H04N19/00;G06T9/00;H03M7/40;H04N1/41;H04N19/42;H04N19/423;H04N19/503;H04N19/61;H04N19/625;H04N19/91;(IPC1-7):H04N7/24 主分类号 H04N19/00
代理机构 代理人
主权项
地址