| 摘要 |
PROBLEM TO BE SOLVED: To control the generation timing of a scrambling key with a timing signal and to make the decoding of the scrambling key to be difficult. SOLUTION: In a packet analysis circuit 101, first and second key data in data are detected and are stored in first and second key data registers 104 and 105. First and second key generation circuits 106 and 107 generate a first key and a second key from first and second key data, and the scrambling key is generated by the exclusive OR. A random number generator 109 generates a PN code used for scrambling with the scrambling key as an initial value and removes scrambling by adding the PN code to data. A control signal CON is supplied to the first key generation circuit 106 from a timing generation circuit 110 and the first key generation circuit 106 is controlled by the control signal CON. In the random number generator 109, the scrambling key is generated only at timing when the initial value is required.
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