发明名称 APPARATUS AND METHOD FOR PROCESSING DIGITAL SIGNAL
摘要 PROBLEM TO BE SOLVED: To generate correct synchronous pulses by turning off a bit slip countermeasure when a tape is reproduced at a different speed from that when the tape is recorded. SOLUTION: In a transition state by a state machine, a width of a detection window at a synchronous window generation circuit 7 is changed, for example, by letting a CPU controlling a digital video tape recorder turn on/off a bit slip countermeasure from outside. When a tape runs at a normal recording speed, the bit slip countermeasure is switched on, so that the detection window of, e.g. a±3-clock width to a 750-clock position is generated. On the other hand, if the tape is reproduced at a speed different from that at the recording time, the bit slip countermeasure is turned off, and the detection window of a±0 width to the 750-clock position is generated. Accordingly, the generation of wrong FWSYNC pulses because of a false synchronization is suppressed.
申请公布号 JPH0982043(A) 申请公布日期 1997.03.28
申请号 JP19950257125 申请日期 1995.09.08
申请人 SONY CORP 发明人 OKAMOTO ICHIRO
分类号 G11B20/14;G11B20/18;(IPC1-7):G11B20/14 主分类号 G11B20/14
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