| 摘要 |
PROBLEM TO BE SOLVED: To provide a matched filter in which an entire circuit can be refreshed while keeping an arithmetic speed. SOLUTION: Plural auxiliary sample-and-hold circuits SHa, SHb holding part of an analog input voltage to be held by a main sample-and-hold circuit SHm, an addition subtraction circuit ADD 1 and an addition subtraction circuit ADD 2 equivalent to the an addition subtraction circuit ADD 1 and a multiplexer MUXo outputting alternatively any output of the addition subtraction circuit ADD 1 or the 2nd addition subtraction circuit ADD 2 are provided in addition and then a period when the sample-and-hold circuit and the addition subtraction circuit ADD 1 in the main sample-and-hold circuit SHm are at a pause is provided and refreshing is conducted for the period. |
