发明名称 RADIO EQUIPMENT
摘要 <p>PROBLEM TO BE SOLVED: To reduce the arithmetic processing time of a transmission signal in a comparison and distortion correction value arithmetic circuit by detecting the delay amount of a feedback signal from a transmission amplifier and comparing the feedback signal with a transmission signal after delay correction so as to obtain a distortion correction value. SOLUTION: Part of a transmission modulated signal is returned to a reception section, demodulated and A/D-converted and the result is stored in a memory 16. In order to correct a delay and distortion caused in this case, a feedback signal stored in the memory 16 is outputted through a delay correction device 19, a modulation input signal is compared with a signal delayed via a fixed delay device 18 at a delay detection circuit 17 to decide the delay correction amount of the correction device 19. An output value of a feedback signal is obtained again by using the correction device 19 correcting the delay and an arithmetic circuit 12 calculates a distortion correction value with respect to the demodulation signal correcting the delay difference and written in a memory 13. When a transmission data signal is received in a succeeding frame, the distortion correction value corresponding to the amplitude of the transmission data is outputted from the memory 13 and multiplexed with transmission data by a multiplier 2 and correction to cancel the nonlinear distortion of the transmission amplifier 5 is conducted.</p>
申请公布号 JPH0983417(A) 申请公布日期 1997.03.28
申请号 JP19950241760 申请日期 1995.09.20
申请人 HITACHI DENSHI LTD 发明人 WAKAI HIROTAKE;OTA MASAAKI;YAMAMOTO HIROYUKI
分类号 H03F1/32;H04B1/40;H04B7/005;(IPC1-7):H04B7/005 主分类号 H03F1/32
代理机构 代理人
主权项
地址