发明名称 SYNCHRONIZATION SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To prevent mis-synchronization by stopping word synchronization when exclusive OR between low-order group signals of adjacent channels is coincident and shifting a window signal by one bit for each prescribed period so as to take frame synchronization. SOLUTION: Exclusive OR circuits 41 , 42 calculate arithmetically exclusive OR between adjacent low order group signals DATA1, 2 and DATA2, 3 and provide the output of the arithmetic result to AIS detection signals AIS DET 12, 23. As a result, when the patterns of both the arithmetic values are coincident, a window generating section 3 releases a 2nd inhibit circuit 26 to stop the word synchronization. Furthermore, the width of the window signal generated in the timing generating section 21 is changed into the same signal length as the frame synchronization word and a 1-bit inhibit circuit 23 shifts the window signal by one bit. A frame synchronization word detection section 12 detects the coincidence between the window signal and the frame synchronization word, a frame synchronizing signal is outputted. Thus, the generation of mis- synchronization is prevented.</p>
申请公布号 JPH0983475(A) 申请公布日期 1997.03.28
申请号 JP19950239593 申请日期 1995.09.19
申请人 FUJITSU LTD 发明人 TAKADA TADAYUKI
分类号 H04J3/06;H04L7/08;(IPC1-7):H04J3/06 主分类号 H04J3/06
代理机构 代理人
主权项
地址