| 摘要 |
A digital demodulator capable of a high speed operation. An automatic frequency controller (AFC) 20 estimates a frequency deviation DELTA omega on the basis of a detected sample signal which is outputted at an oversampling interval by a receiving filter 14. The AFC 20 can estimate the frequency deviation before a stable operation of a bit timing recovery circuit (BTR) 16. The AFC 20 generates a frequency deviation correcting signal for each decision timing on the basis of the estimated frequency deviation, and decision timing information from the BTR 16. A multiplier 22 eliminates a frequency deviation component from an input signal in response to the frequency deviation correcting signal. <IMAGE> |
