| 摘要 |
The present invention provides an apparatus of stuff synchronization frame control which can realize great improvement in the power of error resistance of the stuff synchronization control bit when there occur so many erroneous stuff synchronization control bits that cannot be repaired even by the majority process in a radio section. Radio-side and network-side clocks from the clock counters 11 and 12 are compared by the comparator 13, and the comparison result is inputted into the register 14. On an entry of a new stuff synchronization control bit into the register 14, the stuff synchronization control bit in the frame immediately before the entry is stored in the register 15. The multiplexer 16 multiplexes the stuff synchronization control bit together with transmission data for transmission. The separator 21 receives the data separated from the received data, in the received data buffer 22. When the result obtained by majority processing the stuff synchronization control bit in the frame in question has become unfixed, the comparator 23 switches the selector 25 to control the address counter 26 by means of the output from the comparator 24 which the stuff synchronization control bit in the frame immediately after the switching, has entered. The transmission timing to the network side and the reception timing from the radio side are absorbed by the elastic store memory 27. |
