发明名称 BUS STATUS TEST METHOD
摘要 Disclosed is a test jig to sense moving of bus for micro channel structure. Circuit in the test jig comprises a micro channel slot(1), the first PAL decoder(2), an address latch(100), an address converter(200), the first and second displayers(300, 400). The first PAL decoder(2) decodes various signal from the micro channel slot(1). The address latch(100) latches a channel address from the micro channel slot(1) according to output from the first PAL decoder(2). The address converter(200) decodes binary output data from the address latch(100) into hexadecimal code. The first displayer(300) displays outputs from the address converter(200). The second displayer(400) displays current state fo bus cycle according to the ouput from the first PAL decoder(2). Thereby, the state of bus cycle is directly monitored, and the channel error can be captured.
申请公布号 KR970004260(B1) 申请公布日期 1997.03.26
申请号 KR19890010867 申请日期 1989.07.31
申请人 SAMSUNG ELECTRONICS CO.,LTD 发明人 JUNG, TAEK-KEUN
分类号 G06F11/30;(IPC1-7):G06F11/30 主分类号 G06F11/30
代理机构 代理人
主权项
地址