发明名称 |
Method and apparatus for zero extension and bit shifting to preserve register parameters in a microprocessor utilizing register renaming |
摘要 |
Register identification preservation in a microprocessor implementing register renaming. Multiplexing and control circuitry are implemented for manipulating data sources to be supplied to a microprocessor's functional units. The circuitry will generate zero extending for source data to an execution unit where a data source register specified is shorter than a general register size utilized by the microprocessor. Similarly, the multiplexing and control circuitry will shift bits of data from one location to another upon a source input to a functional unit in accordance with control signals designating such activity.
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申请公布号 |
US5615385(A) |
申请公布日期 |
1997.03.25 |
申请号 |
US19950565646 |
申请日期 |
1995.11.29 |
申请人 |
INTEL CORPORATION |
发明人 |
FETTERMAN, MICHAEL A.;GLEW, ANDREW F.;HINTON, GLENN J.;PAPWORTH, DAVID B.;COLWELL, ROBERT P. |
分类号 |
C23C14/35;C23C16/511;G06F9/38;(IPC1-7):G06F7/00 |
主分类号 |
C23C14/35 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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