发明名称 Method of dicing semiconductor wafer
摘要 A process for manufacturing a semiconductor device is described comprising the steps of providing window openings in a photoresist mask layer for forming trench grooves on the surface of a p+-type epitaxial silicon wafer where an integrated circuit is subsequently formed; providing window openings in the photoresist mask layer for forming dummy etched grooves in a scribe line zone on the wafer; and performing dry etching to remove material exposed by the window openings. The sum of the areas to be etched by dry etching accounts for not less than 5% of the total surface area on one side of the p+-type silicon wafer. Trench grooves are formed in the integrated circuit region of the wafer and dummy etched grooves are formed in a scribe line zone of the wafer. Both the trench grooves and the dummy etched grooves are filled with polycrystalline silicon to provide a smooth wafer surface. The wafer is then cleaved along the scribe line zone. Accordingly, a high density of circuit elements can be realized by forming microminiature etching sections in a stable configuration while preventing side etching during the dry etching processing step. The semiconductor device resulting from the disclosed process is also described.
申请公布号 US5614445(A) 申请公布日期 1997.03.25
申请号 US19920863677 申请日期 1992.04.01
申请人 FUJI ELECTRIC CO., LTD. 发明人 HIRABAYASHI, ATSUO
分类号 H01L21/302;H01L21/301;H01L21/3065;H01L21/76;H01L21/78;H01L27/08;(IPC1-7):H01L21/301 主分类号 H01L21/302
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