发明名称 |
BIT STREAM ENCODING CIRCUIT FOR SPEEDY REPRODUCTION |
摘要 |
The circuit for constructing MPEG 1 bit stream by adding information of 1 picture start address(1PSA) on system layer includes audio and video encoders; a system encoder connected between outputs of the encoders and encoding overall system; a calculator calculating 1PSA of present 1 picture if imput picture is 1 picture, storing calculated 1PSA into a memory, and replacing former 1PSA to present 1PSA; and a 1PSA encoder encoding the stored 1PSA to make independent one packet. |
申请公布号 |
KR970003807(B1) |
申请公布日期 |
1997.03.21 |
申请号 |
KR19930030326 |
申请日期 |
1993.12.28 |
申请人 |
DAEWOO ELECTRONICS CO.,LTD. |
发明人 |
SONG, MIN-JIN |
分类号 |
H04N21/236;H04N19/46;(IPC1-7):H04N7/24 |
主分类号 |
H04N21/236 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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