MULTI-MEDIA PROCESSOR ARCHITECTURE WITH HIGH PERFORMANCE-DENSITY
摘要
A multimedia system has unprogrammable task-specific processors of high performance-density. The task-specific processors perform primitive functions that together constitute a video algorithm. The task-specific processors are interconnected via a high-speed communication module whose interconnectivity is controlled by an arbiter. The arbiter stores a data flow graph. A fully programmable general-purpose processor of low performance-density carries out those tasks that are not readily mapped onto the primitive functions. This configuration with different levels of performance-density and programmability increases overall system performance-density with regard to the prior art.
申请公布号
WO9704401(A3)
申请公布日期
1997.03.20
申请号
WO1996IB00683
申请日期
1996.07.12
申请人
PHILIPS ELECTRONICS N.V.;PHILIPS NORDEN AB
发明人
DE LANGE, ALPHONSIUS, ANTHONIUS, JOZEF;DE WITH, PETER, HENDRIK, NELIS