发明名称 FLASH MEMORY AND DATA PROCESSOR
摘要 <p>PROBLEM TO BE SOLVED: To obtain a flash memory in which the facilitating of external controls is attained by obviating an erasing command. SOLUTION: An MPU 19 controls the erase operation of a flash memory array 13 and the write operation of the write data held in a write data latch 20 to the flash memory 13 as a series of operations by the write data latch 20 holdable the write data fetched via input-output pins (PI/00-P/17) and the command of a write operation from the outside. Consequently, since the issuing of the erasing command at the time of rewriting stored information is obviated, the external controls of the flash memory 10 are simplified.</p>
申请公布号 JPH0973798(A) 申请公布日期 1997.03.18
申请号 JP19950246958 申请日期 1995.08.31
申请人 HITACHI LTD 发明人 NAKAMURA YASUHIRO;FURUSAWA KAZUNORI;ETO JUN;IZAWA KAZUTO;YUGAWA YOSUKE;KOSAKAI KENJI
分类号 G11C17/00;G11C16/02;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
代理机构 代理人
主权项
地址