发明名称 Method for manufacturing semiconductor substrate having buck transistor and SOI transistor areas
摘要 A method for manufacturing a semiconductor substrate structure wherein a comprising the steps of defining bulk transistor and SOI transistor areas, the bulk transistor area disposed on a lower single crystalline silicon layer, and the SOI transistor area diposed on an upper single crystalline silicon layer. The method characterized in that a spacer is formed on a portion of the bulk transistor area which covers a sidewall of the SOI transistor area, a first conductive well is formed in the lower single crystalline silicon layer and a well oxide layer is formed over the first conductive well region, a second conductive well is formed in the lower single crystalline silicon layer between the SOI transistor layer and the first conductive well, and the first conductive well is rediffused.
申请公布号 US5612246(A) 申请公布日期 1997.03.18
申请号 US19950549441 申请日期 1995.10.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 AHN, JONG-HYON
分类号 H01L21/8238;H01L21/20;H01L21/762;H01L21/84;H01L27/08;H01L27/092;H01L27/12;H01L29/786;(IPC1-7):H01L21/76 主分类号 H01L21/8238
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