发明名称 Method and circuit for programming and erasing a memory
摘要 <p>The method involves generation of a programming or erasure voltage with an offset equal to a reference voltage, followed by a ramp leading to a plateau and a final abrupt drop. The offset is fixed at an intermediate voltage (Vint) between the supply voltage and the cell tunnel voltage. The rising portion of the voltage ramp is divided into a first section (202) which leads up to the intermediate voltage, and a second section (203) which rises at a slower rate to the plateau (204). At the plateau, the programming voltage (Vpp) is equal to the maximum voltage value (Vmax).</p>
申请公布号 EP0762428(A1) 申请公布日期 1997.03.12
申请号 EP19960460031 申请日期 1996.09.02
申请人 SGS-THOMSON MICROELECTRONICS S.A. 发明人 NAURA, DAVID;DEVIN, JEAN
分类号 G11C16/12;G11C16/14;(IPC1-7):G11C16/06 主分类号 G11C16/12
代理机构 代理人
主权项
地址