摘要 |
PROBLEM TO BE SOLVED: To easily automate the ASIC design in flip-chip configuration by increasing the degree of freedom of the arrangement of input/output buffers without affecting the basic algorithm of an automatic arrangement wiring tool used for a conventional ASIC design. SOLUTION: The arrangement position of an input/output buffer arrangement part and that of an internal circuit arrangement part are commonly defined without any distinction (processes 11-15). On the other hand, input/output buffers are arranged in one row (processes 17-18) and the power supply to them is separated into a plurality of electrically independent systems as needed so that they can be constantly kept (process 19), thus arranging the input/output buffers with an extremely high degree of freedom in a conventional automatic arrangement wiring program, extremely reducing the free region in a chip which is generated before, increasing the degree of chip designing freedom in terms of characteristics and performance including various environments on a packaging board, and further extremely easily connecting a power supply wiring to the input/output buffers. |