| 摘要 |
PROBLEM TO BE SOLVED: To obtain a test pattern generating circuit which is small in circuit scale and low in power consumption. SOLUTION: This circuit has logical operation circuits 5, 6, and 7 composed of asynchronous circuits which output test patterns consisting of lattice-shaped N×N pixels by performing logical operations between horizontal coordinates and vertical coordinates, a 1st multiplexer 3 which selects one of the logical operation circuits according to a select signal, supplies the horizontal coordinates and vertical coordinates to the selected logical operation circuit, and gives certain values as horizontal coordinates and vertical coordinates to the unselected logical operation circuits, and a 2nd multiplexer 4 which inputs the outputs of the logical operation circuits 5, 6, and 7 and select signal and selects and outputs one of the outputs of the logical operation circuits 5, 6, and 7 according to the select signal. |
