发明名称 PSK MODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To eliminate discontinuity of the phase at a point of time of a frequency shift by simple constitution by performing a phase lock for the other clock pulse by one clock pulse by a constant period and to obtain an FSK (frequency shift) modulation circuit with high frequency accuracy. SOLUTION: The center frequency of an FSK modulation signal is set to 45MHz and the modulation deviation is ±75MHz. Phase comparison signals C and C' that 1/60 and 1/599 frequency divisions are performed for each clock pulse A and B of 45.0MHz and 44.925MHz generated in a crystal oscillator 1 and a voltage controlled oscillator VCO 3, respectively, are made to match in a period and a phase, and each 601 and 599 clock pulse is generated within the one period T by a PLL circuit 5. The both of the pulses A and B are compared in phases by a constant period and are made to match, by a phase comparison circuit 8. At this point of time of a phase comparison, transmission data D is latched and transmission data E which has the same contents and is delayed by a fixed time is obtained. In accordance with logics 1 and 0 the clock pulses A and B are switched and outputted, and an FSK modulation signal F whose phase is continuous is obtained.
申请公布号 JPH0969859(A) 申请公布日期 1997.03.11
申请号 JP19950248701 申请日期 1995.08.31
申请人 SANYO ELECTRIC CO LTD 发明人 MIHARA YOSHIKAZU
分类号 H03L7/00;H04L27/12 主分类号 H03L7/00
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