发明名称 Semiconductor integrated circuit device and method of manufacturing the same
摘要 A plurality of memory cells have their sources and drains formed integrally with n+-buried layers acting as first data lines in a semiconductor substrate. The n+-buried layers are connected with second data lines through transfer MISFETs. These transfer MISFETs have their gates made of the same layer of polycrystalline silicon as that of the floating gates of memory cells are shunted at each predetermined number of bits by Al lines having a lower resistance than that of the polycrystalline silicon.
申请公布号 US5610420(A) 申请公布日期 1997.03.11
申请号 US19950427253 申请日期 1995.04.24
申请人 HITACHI, LTD.;HITACHI VLSI ENGINEERING CORPORATION 发明人 KURODA, KENICHI;TERASAWA, MASAAKI;MATSUBARA, KIYOSHI
分类号 G11C17/00;G11C16/04;H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/788;H01L29/76;H01L29/94;H01L31/062 主分类号 G11C17/00
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