发明名称 |
CHARGING OF BOOTSTRAP CAPACITANCE BY LDMOS |
摘要 |
PROBLEM TO BE SOLVED: To ensure low consumption and high immunity to breakdown of an integrated device by sustaining the open state of a switch during the charging period of a bootstrap capacitance and closing the switch when the charging voltage of bootstrap capacitance reaches a reset threshold level. SOLUTION: A switch INT1 interrupt a source node from then first junction of drain of direct bias junction normally present between the source node and a current source connected with the ground potential during the variation phase of a bootstrap capacitance Cboot. When the variable voltage of bootstrap capacitance Cboot reaches a preset threshold level, the switch INT1 is turned off. Furthermore, an inrush current is limited when a parasitic transistor is triggered, in any case, by means of a limit resistor R inserted between the body node of LDMOS structure and the current source connected with the ground potential. |
申请公布号 |
JPH0965571(A) |
申请公布日期 |
1997.03.07 |
申请号 |
JP19960143765 |
申请日期 |
1996.05.14 |
申请人 |
SGS THOMSON MICROELETTRONICA SPA |
发明人 |
KURAUDEIO DEIATSUTSUI;FUABURITSUIO MARUTEINIYOONI;MARIO TARANTORA |
分类号 |
G01R19/165;H01L21/8234;H01L27/088;H02J1/00;H03K17/06;H03K17/0814 |
主分类号 |
G01R19/165 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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