发明名称 VIDEO SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To synchronize all signal processing circuits or input output circuits connecting to a bus in a video signal processor provided with a bus inputting/ outputting data and commands. SOLUTION: This processor is provided with a synchronizing signal generating circuit 104 to generate a synchronizing signal 107, and sends a synchronizing signal 107 together with a compressed video signal and a command on a bus 105 and a video expansion circuit 103 applies expansion processing to a compressed video signal based on the synchronizing signal 107 outputted from the bus 105. Thus, accurate synchronization of the video expansion circuit 103 is taken by using the synchronizing signal 107 and the synchronizing signal 107 is sent onto the bus 105, then no special signal line to send the synchronizing signal other than the bus 105 is not required.
申请公布号 JPH0965331(A) 申请公布日期 1997.03.07
申请号 JP19950213203 申请日期 1995.08.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOSHIDA JIYUNJI;TAKEDA HIDETOSHI;IKETANI AKIRA
分类号 G09G5/00;G09G5/18;G11B20/10;H04N7/24;H04N19/00 主分类号 G09G5/00
代理机构 代理人
主权项
地址