| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the power consumption and to decrease the substrate occupancy area. SOLUTION: The processing unit has digital modulation circuits and digital demodulation circuits 60, 77 each consisting of a CMOS logic circuit, and D/A converters 52, 79 and A/D converters 59, 76 each consisting of an ECL circuit, and the ECL circuit is operated by possitive/negative bipoler supplies whose center level is arranged with a signal of the CMOS logic circuit. Then the CMOS logic circuit is operated with a signal amplitude arranged with the signal level of the ECL circuit and the ECL circuit and the CMOS logic circuit are connected directly and a high speed signal is sent/received between both the logic circuits.</p> |
