| 摘要 |
PROBLEM TO BE SOLVED: To provide the phase comparator circuit in which an output corresponding to a phase difference is outputted in a voltage range between VL and VH being a circuit operating range in order to realize phase synchronization while using asynchronous input data as a reference timing. SOLUTION: A 1st D flip-flop 11 detects a leading of input data. A 2nd D flip-flop 13 detects a succeeding leading of a VCO output 19 after the leading of the input data is detected to reset the 1st D flip-flop 11. A 3rd D flip-flop 16 discriminates whether a VCO output is lagged from or led to the leading of the input data. An output of an exclusive OR circuit receiving an output of the 3rd D flip-flop 16 and an output 19 of the VCO is used for a control voltage of a VCO 24 via a switch circuit 20. A control signal of the switch circuit is provided by the 1st D flip-flop 11. The result of comparison between the input data and the VCO output is outputted at the leading of the input data and not outputted for other periods. |
