发明名称 FREQUENCY SYNTHESIZER
摘要 PROBLEM TO BE SOLVED: To ensure stability of a loop while an output frequency range is extended by changing a time constant of a loop filter in response to a frequency division ratio set by a variable frequency divider so as to increase a change in a frequency division ratio. SOLUTION: The frequency synthesizer is provided with a phase detector 2 detecting a phase difference between a reference oscillator 1 and a variable frequency divider 3, a loop filter 5 converting an output of the phase detector 2 into a control voltage, and a voltage controlled oscillator 4 generating a frequency signal in response to the control voltage and providing an output to the variable frequency divider 3. Then a time constant of the loop filter provided to part of a phase locked loop provided with the variable frequency divider 3 is changed in response to a frequency division ratio set by the variable frequency divider 3 and even when the frequency division ratio of the variable frequency divider 3 is changed, the stability of a loop is kept by suppressing fluctuation in the natural angular frequency and a damping coefficient. Thus, even when the output frequency range of the frequency synthesizer is extended, a stable operation is realized.
申请公布号 JPH0964733(A) 申请公布日期 1997.03.07
申请号 JP19950240843 申请日期 1995.08.26
申请人 NEC CORP 发明人 FUJISAWA MASAYUKI
分类号 H03L7/093;H03L7/10;H03L7/187 主分类号 H03L7/093
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