发明名称 A GALOIS FIELD POLYNOMIAL MULTIPLY/DIVIDE CIRCUIT AND A DIGITAL SIGNAL PROCESSOR INCORPORATING SAME
摘要 <p>The multiply/divide circuit (20) uses an exclusive OR function (32) of an ALU (30). The result of the exclusive OR function (32) through accumulators (46, 60, 22) and shift registers (26, 34) which recycle the shifted signals back to the ALU (30), can be made to perform the multiply or divide function. When used for telecommunication purposes, the multiply/divide circuit (20) can perform convolution encoding and cyclic redundancy check, among other functions.</p>
申请公布号 WO1997008613(A1) 申请公布日期 1997.03.06
申请号 US1996014009 申请日期 1996.08.27
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