| 摘要 |
PROBLEM TO BE SOLVED: To provide the full-subtracter which is made much faster in subtraction speed than a conventional circuit. SOLUTION: This full-subtracter of CMOS transistor constitution inputs three signals of a minuend A, a subtracter B, and a borrow input Xi which each consist of one bit to generate their inverted signals, and supplies those six signals in total to 1st, 2nd, 3rd, and 4th composite gates 1-4 to obtain difference outputs D at the output terminals of 1st and 2nd composite gates 1 and 2 and borrow outputs Xo at the output terminals of the 3rd and 4th composite gates 3 and 4. |
