| 摘要 |
<p>The invention relates to a data processing apparatus which comprises a microprogrammable processor (1), a random access and a read only control store (4, 5) for storage of microinstructions. The control stores (4, 5) are adapted to output the microinstructions in parallel. The microinstructions comprise a flag microinstruction (REPmark1) which indicates that another microinstruction (add W2, W1) which is stored in the read only control store (5) is faulty. A multiplexer (8) selectively couples the random access or the read only control store to the processor (1). Means for observing the microinstruction (10) observe the microinstructions outputted from the random access controls store (4). The means for observing (10) issue a signal if a flag microinstruction is detected. In response thereto means for inhibiting the carrying out of the microinstruction (10) inhibit the carrying out of the faulty microinstruction by the processor (1).</p> |
