发明名称 |
IMPROVED MEMORY INTERFACE FOR DRAM |
摘要 |
A memory circuit is described which includes memory cells for storing data. The memory circuit can be read from or written to by an external system such as a microprocessor or core logic chip set. The microprocessor provides memory cell address data to the memory circuit and can request that data be output on communication lines for reading therefrom. The memory circuit reduces the time needed to read data stored in the memory by providing a valid output data signal. The valid output data signal indicates that data coupled to the communication lines has stabilized and is therefore valid. Different valid output data signals and trigger circuits for producing the signals are described.
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申请公布号 |
WO9708702(A1) |
申请公布日期 |
1997.03.06 |
申请号 |
WO1996US14001 |
申请日期 |
1996.08.28 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
CLOUD, EUGENE, H.;WILLIAMS, BRETT, L.;MANNING, TROY, A. |
分类号 |
G11C11/401;G11C7/00;G11C7/10;G11C7/22;G11C11/4076;G11C11/409;(IPC1-7):G11C7/00;G11C11/407 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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