发明名称 MULTIPROCESSOR SYSTEM TRANSFERRING ABNORMALITY DETECTION SIGNAL GENERATED IN NETWORKING APPARATUS BACK TO PROCESSOR IN PARALLEL WITH DATA TRANSFER ROUTE.
摘要 A multiprocessor system comprising a networking apparatus (2) and a plurality of data processing apparatuses (11 to 1n) for transferring data through the networking apparatus (2) from one to another of the plurality of data processing apparatuses. The networking apparatus (2) contains: a switch unit (3) for switching data transfer paths between data processing apparatuses; a priority control unit (4) for determining and controlling the data transfer paths in response to requests from the data processing apparatuses; and an abnormality detecting unit (5) for monitoring the operation of the priority control unit (4), generating and outputing to the data processing apparatus which has output the requests an abnormality informing signal. When the networking apparatus is comprised of a plurality of stages each containing at least one switch circuit for switching data transfer paths, an abnormality detection circuit and an abnormality detection signal transferring unit are provided for each switch circuit, for transferring the abnormality detection signal along the route for the data transfer passing through the switch circuit, in a direction opposite to the direction of the data transfer. Further, identification of the stage at which the abnormality detection signal has been generated, may be maintained until the abnormality detection signal reaches the data processing apparatus. <IMAGE>
申请公布号 EP0600581(A3) 申请公布日期 1997.03.05
申请号 EP19930306517 申请日期 1993.08.18
申请人 FUJITSU LIMITED 发明人 ISHIZAKA, KENICHI;KATORI, MASAYUKI
分类号 G06F13/00;G06F11/07;G06F11/22;G06F13/36;G06F15/173;(IPC1-7):G06F11/00 主分类号 G06F13/00
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