| 摘要 |
<p>A sub-gate electrode (20) is arranged to face, through a gate insulating film (19), a surface of a first p-type base layer (11) which is interposed between a first n-type source layer (13) and an n-type drift layer (4), and a surface of a second p-type base layer (14) which is interposed between a second n-type source layer (15) and the n-type drift layer (4) and faces the first p-type base layer (11). A main gate electrode (18) is arranged to face, through a gate insulating film (17), a surface of the second p-type base layer (14) which is interposed between the second n-type source layer (15) and the n-type drift layer (4) and does not face the first p-type base layer (11). Three n-type MOSFETs are constructed such that one n-type channel is to be formed in the first p-type base layer (11) and two n-type channels are to be formed in the second p-type base layer (14). The three channels are to be formed, so that the channel width is effectively enlarged and the current density is increased. The second p-type base layer has a length of 10 mu m or less in the drifting direction. <IMAGE></p> |
