发明名称 Circuit arrangement for testing functioning of current monitor circuit for power transistor
摘要 The circuit arrangement tests a power transistor made up of a number of parallel connected individual transistors. A fraction of the current flow to the power transistor flows through each individual transistor. A monitor signal proportional to the current through one of the individual transistors is fed to the current monitor circuit. This generates an alarm signal when the monitor signal exceeds a predetermined threshold value. The individual transistors are divided into a group with a smaller number of parallel individual transistors and a group with a larger number of transistors. The two groups are controlled independent of each other. The transistor which provides the monitor signal belongs to the smaller group. A control circuit is provided. In a test mode, in which only a current reduced by the ratio of the number of transistors in the two groups is fed to the power transistor, the larger group of individual transistors is set to the non-conductive state.
申请公布号 DE19527487(C1) 申请公布日期 1997.02.27
申请号 DE19951027487 申请日期 1995.07.27
申请人 TEXAS INSTRUMENTS DEUTSCHLAND GMBH, 85356 FREISING, DE 发明人 SCOONES, KEVIN, 85368 MOOSBURG, DE;BAYER, ERICH, 84030 PIFLAS, DE
分类号 G01R31/26;G01R19/165;H03K17/082;H03K17/12;(IPC1-7):G01R31/28;G01R17/02 主分类号 G01R31/26
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