发明名称 |
Semiconductor memory device e.g. ROM |
摘要 |
The semiconductor device, e.g. ROM (1000), includes several columns (UB,DB) and an output part (CS1,CS2). Each column contains a number of memory cells (M10-M31) and the output part is connected to the columns. Each of the memory cells are switchable to an on or off state and at least one of the cells is in an off state. The memory cells, including the at least one off state cell, are programmed with scheduled data. A data inverter (IV) is connected to at least one of the columns to invert data output via the output part.
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申请公布号 |
DE19632087(A1) |
申请公布日期 |
1997.02.27 |
申请号 |
DE19961032087 |
申请日期 |
1996.08.08 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
MAENO, HIDESHI, TOKIO/TOKYO, JP |
分类号 |
G11C17/12;H01L27/112;(IPC1-7):G11C17/14;H01L21/00 |
主分类号 |
G11C17/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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