| 摘要 |
PROBLEM TO BE SOLVED: To accurately detect a clock phase error even in the case of (n)-phase modulation (n>=8). SOLUTION: According to polarity changes of two series of demodulated digital signals of an I channel and a Q channel obtained from an (n)-phase modulated signal through quadrature demodulation, one of the inverted and uninverted signals of the demodulated digital signals are outputted from polarity inverting circuits 17a and 17b. Those outputs are added together by an adder 19. As to the two series of the demodulated signals of the I channel and Q channel, EX.ORs 14a and 14b perform zero-crossing detection and at the same time, the addition result of the adder 19 is outputted as a phase error detected value when zero crossing is detected. At the same time, a value showing that a phase error is zero is outputted when the zero crossing is not detected. |
