发明名称 Scalable test interface port
摘要 An apparatus for electrically connecting electrical contact pads on a first circuit board to electrical contact pads on a second circuit board is disclosed. Conductive bumps coupled to signal wires on a support element mate with the electrical contact pads on the first and second circuit boards. The mating provides an electrical connection allowing signals to be transmitted between the circuit boards. Alignment holes and alignment circuitry provide a means for verifying that the proper conductive bumps are mating with the proper electrical contact pads.
申请公布号 US5603619(A) 申请公布日期 1997.02.18
申请号 US19950504842 申请日期 1995.07.20
申请人 INTEL CORPORATION 发明人 TURNER, LEONARD O.;BUDELMAN, GERALD A.;TROBOUGH, MARK B.
分类号 G01R1/04;G01R31/28;H01R12/04;H01R13/24;H01R13/66;H05K3/32;H05K3/36;(IPC1-7):H01R9/09 主分类号 G01R1/04
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