Semiconductor memory device responsive to hierarchical internal potentials

摘要

A semiconductor memory device includes a semiconductor substrate, a plurality of memory blocks, first and second substrate potential generating circuits and a select circuit. The semiconductor substrate includes a plurality of wells corresponding to the memory blocks. Each memory block includes a plurality of memory cells formed on corresponding wells. The select circuit supplies to the well of the activated memory block a deep substrate potential generated by the first substrate potential generating circuit, and supplies to the well of the unselected memory block a shallow substrate potential generated by the second substrate potential generating circuit. Thereby, the minimum operation in the inactive memory block is ensured in spite of the fact that a power consumption of the inactive memory block is reduced.