| 摘要 |
A method for fabricating a non-volatile memory device is disclosed. According to the method for fabricating the non-volatile memory device, EEPROM cell has a first floating gate(5) and, additionally, a second floating gate(10) composing of a second conductive layer(10) which overall covers the first floating gate(5) and a selective gate(6), resulting in the increase of surface area of the total floating gate. Therefore, the surface area of the second insulating layer(11) between the second conductive layer(10) and a control gate of a third conductive layer(14) is increased. Thereby, a high speed operation is available at a low potential, increasing a charge storage to the floating gate and improving the charge reservation period.
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