发明名称 SEMICONDUCTOR MEMORY AND LAYOUT STRUCTURE OF ASSOCIATIVE MEMORY
摘要 PROBLEM TO BE SOLVED: To enable a semiconductor memory to be enhanced in signal transmission speed, lessened in power consumption, and improved in degree of integration by a method wherein memory cell arrays where memory cells are provided are arranged in two or more lines on the memory word, and sub-word lines which turn memory cells active are provided in the memory cell arrays. SOLUTION: A memory word 43 composed of memory cells 41 is composed of a set of two memory cell arrays 43a and 43b where memory cells 41 as many in number of bits as 1/2 word are arranged, and only main word lines 47-1, 47-2,... are provided. Two sub-word lines 24a and 24b which turn active together with one of the main word lines 47 are provided in the memory word 43, whereby all the memory cells 41 of the memory cell arrays 43a and 43b can be turned active at the same time. By this setup, the number of main word lines 47-1, 47-2,... required for memory cell arrays can be reduced by half, so that memory cells can be enhanced in degree of integration.
申请公布号 JPH0945870(A) 申请公布日期 1997.02.14
申请号 JP19950251197 申请日期 1995.09.28
申请人 KAWASAKI STEEL CORP 发明人 YONEDA MASATO
分类号 H01L27/10;G11C15/04 主分类号 H01L27/10
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