| 摘要 |
PROBLEM TO BE SOLVED: To provide a variable delay circuit with desired optional resolution by controlling 1st and 2nd delay circuits so as to make their delay times equal to each other. SOLUTION: The circuit is provided with paths A, B giving a signal received to an input terminal 12 to an output terminal 22, a variable delay section 24 having a selection section to select either of the paths A, B by means of a selection signal, a delay circuit 26 having a delay time being a multiple of (x) of a part or an entire delay time of the path A (hereinafter called delay time of path A), a delay circuit 27 having a delay time being a multiple of (y) of a part or an entire delay time of the path B (hereinafter called delay time of path B), a phase comparator circuit 28 comparing a phase of the signal resulting from delaying the clock signal by the delay circuit 26 with a phase of the signal delayed by the delay circuit 27, and a delay time control circuit 29 controlling the delay time of the delay circuit 27 and controlling the delay time of the path B so that the delay times of the delay circuits 26, 27 are equal to each other based on the phase comparison result. |
