发明名称 SEMICONDUCTOR ELEMENT, ITS WIRE FORMING METHOD, AND GATE ELECTRODE FORMING METHOD
摘要 PROBLEM TO BE SOLVED: To improve yield, reduce cost, and improve performance and reliability by forming the wire of a semiconductor element or a gate electrode layer with silicon and germanium alloy and oxidizing a part or all of the surface. SOLUTION: After successively forming a field oxide film 2, a channel stopper 3, and a gate oxide film 4 on a silicon substrate 1, polycrystal silicon/germanium is selectively formed as a gate electrode 5 and a grounding wire 6. After it is doped with impurity ions and a source/drain region 8 is formed, the gate electrode 5 and the grounding wire 6 are thermally oxidized at 700 deg.C or lower temperature for insulation separation. Finally, after a through hole is formed, a source/drain electrode 9 is formed.
申请公布号 JPH0945903(A) 申请公布日期 1997.02.14
申请号 JP19950192725 申请日期 1995.07.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TSUTSU HIROSHI
分类号 H01L21/28;H01L21/3205;H01L23/52;H01L29/78;H01L29/786;(IPC1-7):H01L29/78;H01L21/320 主分类号 H01L21/28
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