CONFIGURATION AND FABRICATION OF SEMICONDUCTOR STRUCTURE HAVING TWO LEVELS OF BURIED REGIONS,申请号EP19960903613-传众专利搜索

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发明名称	CONFIGURATION AND FABRICATION OF SEMICONDUCTOR STRUCTURE HAVING TWO LEVELS OF BURIED REGIONS
摘要
申请公布号	EP0757847(A1)	申请公布日期	1997.02.12
申请号	EP19960903613	申请日期	1996.01.17
申请人	NATIONAL SEMICONDUCTOR CORPORATION	发明人	FARRENKOPF, DOUGLAS, R.;MERRILL, RICHARD, B.;SAHA, SAMAR;BREHMER, KEVIN, E.;GADEPALLY, KAMESH;CACHARELIS, PHILIP, J.
分类号	H01L21/761;H01L21/822;H01L21/8249;H01L27/02;H01L27/06;H01L27/088;(IPC1-7):H01L27/06;H01L21/824	主分类号	H01L21/761
代理机构		代理人
主权项
地址

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