发明名称 Semiconductor memory device having floating gate transistors and data holding means
摘要 In a semiconductor memory device, a data holding unit is disposed separately from the first and second floating gate transistors. A voltage difference is generated by the difference between the threshold voltages of the first and second floating gate transistors, and the voltage difference is stored in the form of a binary data. Thereafter, the first and second floating gate transistors are turned off. Thus, a minute current which always flows through the first and second floating gate transistors in the conventional technique is prevented from being generated so that the power consumption is reduced. In addition, data is fetched from the data holding unit while the bias voltage generating units are turned off. Thus, the time period of operating the bias voltage generating units is eliminated so that the memory device can operate at a high speed.
申请公布号 US5602777(A) 申请公布日期 1997.02.11
申请号 US19950449022 申请日期 1995.05.24
申请人 SHARP KABUSHIKI KAISHA 发明人 NAWAKI, MASARU;UENO, SHOUNOSUKE
分类号 G11C17/00;G11C16/04;G11C16/28;G11C29/00;H01L21/8247;H01L27/115;(IPC1-7):G11C16/02 主分类号 G11C17/00
代理机构 代理人
主权项
地址